Some aspects of hardware-aware quantum error correction
Ophelia Crawford
Riverlane
To make best use of limited quantum resources in the near, medium and long term, it is clear that it will be important to understand the performance of, and to design, quantum error correction (QEC) protocols with qubit hardware properties in mind. In this talk, I will discuss several aspects of QEC circuitry and decoding in this context.
As one example, I will consider the effect of resetting, or not, qubits during quantum error correction experiments. Text-book quantum error correction demands that qubits are reset after measurement in syndrome extraction circuits. However, fast qubit reset can be challenging to execute at high fidelity. I will present theoretical and simulation results demonstrating the effect of not resetting qubits on both quantum memory and logical operations, and two novel syndrome extraction circuits that may be of benefit in the no-reset regime.